AIM: To Simulate, Synthesize and Implement VHDL code for Shift Register.
LEARNING OBJECTIVE: To implement shift register using VHDL design entry method.
EQUIPMENT'S REQUIRED: PC with Xilinx Software loaded (14.7 or 8.2 versions)
AIM: To prepare CMOS layout, simulate and verify the output of D Flip flop EQUIPMENT'S REQUIRED: PC with Microwind software
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