Friday, July 24, 2020

VLSI Virtual Experiment 1: Adder


                     

     
AIM: To Simulate, Synthesize and Implement VHDL code for  Half Adder. 
 

EQUIPMENT'S REQUIRED: PC with Xilinx Software loaded (14.7 or 8.2 versions)
 
   


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VLSI Virtual Experiment 8: D Flipflop

AIM: To prepare CMOS layout, simulate and verify the output of D Flip flop EQUIPMENT'S REQUIRED: PC with Microwind software