VLSI Virtual Experiment 6: CMOS Inverter

 

AIM: To prepare CMOS layout, simulate and verify the output of Inverter

EQUIPMENT'S REQUIRED: PC with Microwind software

                          

 

VLSI Virtual Experiment 5: FIFO

                       

AIM: To Simulate, Synthesize and Implement VHDL code for FIFO memory. 

 LEARNING OBJECTIVE: To implement FIFO memory using VHDL design entry method.

 EQUIPMENT'S REQUIRED: PC with Xilinx Software loaded (14.7 or 8.2 versions)

 

VLSI Virtual Experiment 4: Shift Register

 AIM: To Simulate, Synthesize and Implement VHDL code for Shift Register. 

 LEARNING OBJECTIVE: To implement shift register using VHDL design entry method.

 EQUIPMENT'S REQUIRED: PC with Xilinx Software loaded (14.7 or 8.2 versions)

      

 

VLSI Virtual Experiment 3: ALU

                          

 

AIM: To Simulate, Synthesize and Implement VHDL code for ALU. 

 

LEARNING OBJECTIVE: To implement ALU using case statement and VHDL design entry method.. 

EQUIPMENT'S REQUIRED: PC with Xilinx Software loaded (14.7 or 8.2 versions)